Delay in spi readwrite function. Slow chip select response

i am trying to read adc over SPI but,
because of slow chip select response i cant achieve my desired speed.
now i’m getting 20Ksps.
I want to achieve minimum 50Ksps.

Spi configured for 10Mhz,bits per word = 8.

Thanks in advance

Dear @akshykhade,

Did you probe the SPI signals? How much delay between actual chip select is asserted and spi clock starts?
Could you share which slave device you are communicating? Please share part number.
Why don’t you increase the Spi clock and try it?
You would try bulk read and write instead of chunks of reading and write API calling repeatedly.
Maybe share your SPI application and let me look the code and let you know if we find anything there.
Please share as much as details relevant to your issue and that will help us to provide a workable solution for the issue.
Thank you.

dear @raja.tx ,
Yes I probe SPI signals.
I am evaluating toradex now so, i’m using basic adc MCP3201(so, read only).
my goal is to achieve maximum sampling speed.
firstly i’m trying to find spi library performance, and found delay after reading CLK completed that is 16 pulses, the ~CS pin take time to go high. nearly 40 us and next spi call starts after 60 us.

i’m also trying to understand mapmem library. so i can test maximum speed of SPI from registers.
with reference to this

thanks for your reply.
i’ll share screenshots and code asap.

Dear @akshykhade,

Please share the screenshots and code of the real issue then we would like to look into it.

Hi,

There is an issue in the SPI driver, I figured out last year, just search for ‘Gerhard’ and ‘SPI’, I provide screenshots and so on.
(Found one: SPI, sporadic problem loosing ~CS during transfer - Technical Support - Toradex Community)

Main problem is, that the driver didn’t use the nCS signal generated by the SPI hardware, instead it generates the nCS by setting a gpio signal. This takes this additional time and generates the delay you found.
In addition, other threads were able to use the same GPIO bank and this ends up in losing the nCS during transmission due to another bug. The actual setting of the output register isn’t read before a setting is done. This is the reason, while the nCS is lost during transmissions when another thread uses GPIO4.

Unfortunately, there is no fix planned for now.

Sorry, no better news. I also have to fight with the SPI driver, which takes very much of my time and ends up with a solely solution, but it is working now.

I use a 24 bit ADC,sampling 6 channels simultaneously but my sampling rate is 15ksps, this works fine.

With best regards

Gerhard

Dear @Gerhard ,

Thanks for taking the time to help in the community.

Dear @akshykhade,

Please let us know if you need any support on this.