Hello,
I have a some problem with 24bpp RGB output.
It seems, the framebuffer size have some limitations:
If I set framebuffer to 16bpp, fbset reports correct size:
video=tegrafb0:pixclockpol:0,outputen:1,1920x1080@60
root@colibri-t30:~# fbset
mode "1920x1080-60"
# D: 148.500 MHz, H: 67.500 kHz, V: 60.000 Hz
geometry 1920 1080 1920 2160 16
timings 6734 148 88 36 4 44 5
hsync high
vsync high
rgba 5/11,6/5,5/0,0/0
endmode
If I set 24bpp mode, framebuffer is smaller then my desired resolution:
vidargs=video=tegrafb0:pixclockpol:0,outputen:1,1920x1080-24@60
root@colibri-t30:~# fbset
mode "1400x1050-60"
# D: 108.003 MHz, H: 63.983 kHz, V: 59.965 Hz
geometry 1400 1050 1400 2100 32
timings 9259 136 40 13 1 112 3
rgba 8/0,8/8,8/16,8/24
endmode
Is there any connection between frambuffer settings and Xorg rendering? Xorg config is the same in this two cases, but painting on display is totally damaged (any small screens with incorrect offset)
In both cases colours is damaged well.
Kernel diff:
--- a/arch/arm/mach-tegra/board-colibri_t30-panel.c
+++ b/arch/arm/mach-tegra/board-colibri_t30-panel.c
@@ -239,6 +239,8 @@ static struct tegra_dc_out_pin colibri_t30_dc_out_pins[] = {
},
};
+
+
static struct tegra_dc_out colibri_t30_disp1_out = {
.type = TEGRA_DC_OUT_RGB,
.parent_clk = "pll_d_out0",
@@ -246,7 +248,7 @@ static struct tegra_dc_out colibri_t30_disp1_out = {
.align = TEGRA_DC_ALIGN_MSB,
.order = TEGRA_DC_ORDER_RED_BLUE,
- .depth = 18,
+ .depth = 24,
.dither = TEGRA_DC_ORDERED_DITHER,
/* Use 32-bit depth for android builds */