I modified my carrier board as shown in the attached Colibri_adapter-ETH2.pdf diagram with the connections to the Colibri iMX7D V 1.1A module.
I also modified the device tree to enable the second ethernet as per the attached file enet2_dts_and_log.txt.
The result of the boot log is:
root@colibri-imx7-emmc:~# dmesg | grep net
[ 0.079399] imx7d_enet_clk_sel: fec1: failed to get enet_out clock, assuming ext. clock source
[ 0.079495] imx7d_enet_clk_sel: fec2: found enet_out clock, assuming internal clock source
[ 0.338243] libphy: fec_enet_mii_bus: probed
[ 0.341202] fec 30be0000.ethernet eth0: registered PHC device 0
[ 0.345328] 30bf0000.ethernet supply phy not found, using dummy regulator
[ 0.354470] libphy: fec_enet_mii_bus: probed
[ 0.357247] fec 30bf0000.ethernet eth1: registered PHC device 1
[ 0.711751] nfnl_acct: registering with nfnetlink.
[ 0.713779] nf_tables: (c) 2007-2009 Patrick McHardy
[ 2.559343] using random self ethernet address
[ 2.560592] using random host ethernet address
[ 3.743513] Micrel KSZ8041 30be0000.ethernet-1:00: attached PHY driver [Micrel KSZ8041] (mii_bus:phy_addr=30be0000.ethernet-1:00, irq=-1)
[ 3.771180] fec 30bf0000.ethernet eth1: no PHY, assuming direct connection to switch
[ 3.776501] fec 30bf0000.ethernet eth1: could not attach to PHY
[ 5.834429] fec 30be0000.ethernet eth0: Link is Up - 100Mbps/Full - flow control rx/tx
root@colibri-imx7-emmc:~#
You can kindly help me to understand the following:
why imx7d_enet_clk_sel: fec2: found enet_out clock, assuming internal clock source?
why 30bf00.ethernet indicates supply PHY not found?
what is the error because fec 30bf0000.ethernet eth1 does not recognize the PHY?
I cannot have the second ethernet port working and if I cannot solve this problem I’m forced to use a different module due to time constraints on my project.
Thanks in advance.
Yours sincerely
Ing. Paolo Bazzanella link text
Hi @jaski.tx
I apologize for the delay in replying.
The kernel version is TORIZON LINUX 2.8b.
I checked at boot time the presence of a handshake between the COLIBRI module and the KSZ8041NL chip on my board, but there is no clock presence on the line SODIMM 88 (MX7D_PAD_I2C2__CCM_ENET_REF_CLK2 0x73)
I attach in this e-mail link text the boot log and the device tree files.
It is difficult to help you without having the carrier board. However I can provide you some hints. Please have a look at this community post, where a customer successfully added a second PHY to iMX7 on the custom carrier board.
Regarding the clock, I would put the pad control registers to 0x1 and not 0x73. If you copied the device tree from the fec1 node, then you should know that in our design the ref clock is provided by an external oscillator and not internally by the SOC.
Hi Alex,
many thanks for the suggestions, the second Ethernet is now recognized.
A problem that I have not solved yet on the second ethernet: it continues to connect and disconnect every 80 seconds or so with the following message:
[12661.021815] IPv6: ADDRCONF(NETDEV_CHANGE): eth1: link becomes ready
[12663.093589] fec 30bf0000.ethernet eth1: Graceful transmit stop did not complete!
[12663.101019] fec 30bf0000.ethernet eth1: Link is Down
[12663.144841] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready
Do you have any suggestions for resolving this problem?
Thank you in advance
Hi jaski,
I modified the circuit of the second ethernet with a 50 MHz oscillator connected to the SODIMM 88 of the Colibri module inmx7d 1GB and to pin 9 of the KSZ8041NL chip. With the device tree changes in the “device-tree-ETH2” file the second eterneth works but with the problem previously reported.I also attached the boot log. Any suggestions to solve the problem is well accepted. Thank you in advance link text
Additionally could you check the MDIO and MDC signals, if they are correct.
You might need to activate the pull up for MDIO Line and Pull Down for MDC Line.
Hi @bzzpaolo,
have you solved this issue?
I am in a similar situation, with an external 50 MHz oscillator connected to SODIMM 106 and to pin 9 of a PHY present on my custom board.
What I’m experiencing is some kind of conclict between the 2 fec interfaces.
I’d like to discuss about this issue with you.
Hi lupo,
I solved as hardware by connecting the 50MHz oscillator output to pin 9 of the PHY and pin SODIMM 88 of the Colibri module.
Besides modifying the device tree I pull-up the MDIO line with 1k2 Ohm to Vcc and pull-down the MDC line with 4k7 Ohm to GND as suggested by jaski.tx.
Also in my PCB pin 2 (VPLL1.8V) of KSZ8041 was connected to pin 3 (Vcc3V3). Disconnected the pins and replaced the KSZ8041 chip now the harware seems to work.
[ 5.834507] Micrel KSZ8041 30bf0000.ethernet-2:01: attached PHY driver [Micrel KSZ8041] (mii_bus:phy_addr=30bf0000.ethernet-2:01, irq=-1)
[ 5.850685] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready
[ 8.955228] fec 30bf0000.ethernet eth1: Link is Up - 100Mbps/Full - flow control rx/tx
[ 8.963207] IPv6: ADDRCONF(NETDEV_CHANGE): eth1: link becomes ready
However, there are further problems.
At the start the DHCP service can’t assign an IP address to the eth1 interface as see with ifconfig;
but anyway AdvancedIPScanner finds two sessions associated with the COLIBRI module (colibri-hw2)
If I open two SSH sessions with putty (one on eth0 and one on eth1) and run htop, I can see the data correctly.
If I disconnect the eth0 ethernet cable, both SSH sessions stop, and the SSH session resume them if I reconnect the lan cable.
If I unplug the eth1 ethernet cable, the data of the two SSH sessions continue to arrive: it seems that the data pass only on eth0.
I’m investigating, and if I find any solutions, I’ll let you know.
but if you’ve got any ideas about this problem or some test to make, you’re always welcome.
Unfortunately we have problems to reproduce this issue on our side… If one of you could send us a carrierboard this would be helpful. However, first of all do you see any error if you check the ethtool statistics?