Configure IMX6ULL Pin as Active Low

Technical Support
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1

Hello Toradex Team,

I’m using IMX6ULL 256 MB V1.0A SoM with console image version 2.8b.
I have disabled the LCD driver and configured the pins as GPIO. But am facing issue with SODIMM Pin 71 (JTAG_TMS gpio1io11) and SODIMM 131 (SNVS_TAMPER5 gpio5io5). I have disabled their default configuration in the device tree and configured it as gpio in my device tree. The problem is that I want to use SODIMM Pin 71 as Output pin, but the pin is getting configured as Active High.I am not able to change the state of the pin. It stays High even after changing the value. And SODIMM Pin 131 as Input pin, here too it is getting configured as Active High. So When I ground the Pin 131 it gives me Low state but when kept open it gives me High state. All other configuration that i am doing are getting configured as expected but only these pins are not.

Below is my edited dts file :
The Last 2 pins are the ones…

    /dts-v1/;

    #include "imx6ull-colibri-nonwifi.dtsi"
    #include "imx6ull-colibri-eval-v3.dtsi"

                          / {
model = "Toradex Colibri iMX6ULL 256MB on Colibri Evaluation Board V3";
compatible = "toradex,colibri_imx6ull-eval", "fsl,imx6ull";

 gpio_additional {
          pinctrl-names = "default";
          pinctrl-0 = <&pinctrl_additionalgpio>;
          status = "okay";
     };
 
 };
 

        &lcdif {
 status = "disabled";
   };


 &iomuxc {
     pinctrl-names = "default";  
     
     imx6ull-eval-v3 {
         pinctrl_additionalgpio: additionalgpios {
             fsl,pins = <
                            MX6UL_PAD_LCD_DATA13__GPIO3_IO18  0X14  
                            MX6UL_PAD_LCD_DATA14__GPIO3_IO19  0X14  
			MX6UL_PAD_LCD_DATA15__GPIO3_IO20  0X14  
                            MX6UL_PAD_LCD_DATA16__GPIO3_IO21  0X14
			MX6UL_PAD_LCD_DATA05__GPIO3_IO10  0X14  
			MX6UL_PAD_LCD_DATA17__GPIO3_IO22  0X14  
			MX6UL_PAD_LCD_DATA06__GPIO3_IO11  0X14  
			MX6UL_PAD_LCD_DATA07__GPIO3_IO12  0X14  
			MX6UL_PAD_LCD_DATA08__GPIO3_IO13  0X14  
			MX6UL_PAD_LCD_DATA12__GPIO3_IO17  0X14  
			MX6UL_PAD_LCD_DATA09__GPIO3_IO14  0X14
                            MX6UL_PAD_LCD_DATA01__GPIO3_IO06  0X14  
			MX6UL_PAD_LCD_DATA02__GPIO3_IO07  0X14  
			MX6UL_PAD_LCD_DATA03__GPIO3_IO08  0X14 
                            MX6UL_PAD_LCD_DATA04__GPIO3_IO09  0X14  
			MX6UL_PAD_LCD_HSYNC__GPIO3_IO02  0X14 
                            MX6ULL_PAD_BOOT_MODE0__GPIO5_IO10	0x14
                            MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08	0x14
                            MX6UL_PAD_GPIO1_IO02__GPIO1_IO02	0x14
                            MX6UL_PAD_NAND_CE1_B__GPIO4_IO14	0x14
                            MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11	0x14
			MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05        0X14 
			MX6UL_PAD_JTAG_TMS__GPIO1_IO11        0X14 
                            

			
             >;
         };

          
     };
 
 };

I have also removed the pinctrl_gpio_bl_on: gpio-bl-on node for Pin 71 and
commented out the MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x14 from pinctrl_snvs_hog_1: snvs-hoggrp-1 for pin 131.

Please let me know what can be done.
Thanks…

2

HI @Sohan and Welcome to the Toradex Community!!!

There was an error in iomux configuration in the kernel branch 4.9.2.3 as explained here. Please use the
newer corrected config which is described here and used in kernel branch 4.14.2.0.

Best regards,
Jaski

3

Hi…
I tried changing the value from 0x14 to 0x2000 but still it doesnt work.

5

HI

I did the following changes in the kernel branch 4.14.2.0 and it is working.

diff --git a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
index 192cd7326d6d..7282686e6c05 100644
--- a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
@@ -73,7 +73,7 @@
        default-brightness-level = <4>;
        power-supply = <&reg_3v3>;
        pwms = <&pwm4 0 6666667 PWM_POLARITY_INVERTED>;
-       status = "okay";
+       status = "disabled";
 };
 
 &pxp {
diff --git a/arch/arm/boot/dts/imx6ull-colibri-nonwifi.dtsi b/arch/arm/boot/dts/imx6ull-colibri-nonwifi.dtsi
index 95a11b8bcbdb..c19bd85cf4e0 100644
--- a/arch/arm/boot/dts/imx6ull-colibri-nonwifi.dtsi
+++ b/arch/arm/boot/dts/imx6ull-colibri-nonwifi.dtsi
@@ -15,7 +15,8 @@
 &iomuxc {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3
-               &pinctrl_gpio4 &pinctrl_gpio5 &pinctrl_gpio6 &pinctrl_gpio7>;
+               &pinctrl_gpio4 &pinctrl_gpio5 &pinctrl_gpio6 &pinctrl_gpio7 &pinctrl_gpio_bl_on
+>;
 };
 
 &iomuxc_snvs {
diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx6ull-colibri.dtsi
index e627d8d969e7..e4724ab6595f 100644
--- a/arch/arm/boot/dts/imx6ull-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi
@@ -605,7 +605,7 @@
                        MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06     0x110a0 /* SODIMM 93 */
                        MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03     0x110a0 /* SODIMM 95 */
                        MX6ULL_PAD_BOOT_MODE0__GPIO5_IO10       0x1b0a0 /* SODIMM 105 */
-                       MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05     0x0b0a0 /* SODIMM 131 */
+                       MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05     0x030a0 /* SODIMM 131 */
                        MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08     0x110a0 /* SODIMM 138 */
                >;
        };

Best regards,
Jaski