Achieving lowest power consumption

Hello,

We’re currently evaluating your iMX7S SOM with Viola carrier board for use in a coming product.
Our application requires very low power consumption during quiescent periods. We’d like to achieve around 25mW. From this state, we would need to be able to wake on UART, USB, RTC, at a minimum.

  1. Is it realistic to think we might achieve 25mW with this combination?
  2. What suspend mode must be used and is it fully supported by your BSP?
  3. What are limitations for wake-up from the mode, e.g., wake-on, but not from…?
  4. Does the existing power control logic handling power down peripheral devices when entering low power modes?

Thanks for any additional thoughts you have on the subject, as well.

Thanks,

mrn

We are still working on/verifying our low power design, hence this information is preliminary.

  1. Is it realistic to think we might achieve 25mW with this combination?

25mW overall consumption is probably a bit optimistic.

Using UART/USB as wake-up source means you can not leverage the deepest available sleep mode of the i.MX 7 SoC (which is the LPSR mode). According to data sheet the SoC should consume around 10mW in Low Power mode (with USB in suspend), but there will be additional consumption by the DDR in self-refresh, PMIC and other consumers. As for the module, I would guess that we should be able to land around that figure. But there will be some additional power loss due to the 5V to 3.3V conversion on Viola.

  1. What suspend mode must be used and is it fully supported by your BSP?

The code in the latest release hasn’t been optimized with regards to suspend yet. It seems that regular Low Power mode (by default when using Suspend-to-Memory on Linux) works and consumes around 135mW currently. The i.MX 7 LPSR mode is also planned but will be probably a bit further out.

  1. What are limitations for wake-up from the mode, e.g., wake-on, but not from…?

There are two kinds of limitation: What the hardware can do, and what the software supports… Hardware:

  • LPSR: RTC and 16 designed GPIO’s
  • Regular Suspend: Almost any on-board Peripherie such as FlexCAN, USB, UART, any GPIO etc…

Software:

  • LPSR: Both methods will be supported, once LPSR suspend actually works
  • Regular Suspend: RTC, any GPIO, UART and probably more. USB should work too, but we did not verify it yet.
  1. Does the existing power control logic handling power down peripheral devices when entering low power modes?

The peripherals on the SoC should be power gated through the internal global power controller. Peripherals on the module are sent in low power mode by drivers on suspend. For some (e.g. Ethernet PHY) we have the option to power gate them too, this is currently still pending.

How has the latest Linux BSP changes things? Are you near completion of low power support?

Thanks

The power gating of the Ethernet PHY has been implemented and works. Power consumption in sleep mode is currently at around 75mW. This is still higher than what we expect, further investigations are still pending.

Is it currently possible to put Linux into a low-power suspend mode while maintaining normal operation of the M4 core and peripherals assigned to it? And then wake Linux from the M4? And are there any rough estimates of power consumption for the M4 core alone?

I am considering an application where the M4 handles incoming data over the general-purpose parallel bus while the A7 sleeps for most of the time.

We haven’t tested that use case a lot. There is an example rand_wfi in the FreeRTOS BSP, which cycles the M4 through various states. This should work together with the Linux suspend modes, and allow to run Linux only. Running the M4 at 200MHz showed a power consumption of around 310mW…

http://git.toradex.com/cgit/freertos-toradex.git/tree/examples/imx7_colibri_m4/demo_apps/low_power_imx7d/rand_wfi?h=colibri-imx7-m4-freertos-v8

I am using the imx7s with viola plus board. The overall power consumption is ~120mA, and when i put it to suspend-to-ram the power consumption is ~20mA. In this mode the processor is being able to wake up from an incoming UART communication. Is this already the LPSR mode or just the Linux default one?

The standard mode used in Linux is Deep Sleep Mode (DSM). At this point, this is the lowest possible mode. LPSR implementation is still pending,
see Issue #24542.

I can see that it is not yet scheduled, any rough estimations?
Would the LPSR enable greater current reduction?

No estimate at this point. According to the data sheet Table 15 the difference between DSM (SUSPEND) and LPSR is only 1.6mW… Since we are 67mW currently other power consumers seem to have higher potential.

Thank you very much!

Hi @stefan_e.tx ,

I’m working with iMX7D that support Arm Cortex-A7 + Cortex-M4. I referenced to Use a Single Ultra-Low-Power HMP Processor for Both Real-Time and Applications Processing Workloads, in the heterogeneous architect, it support 2 processer with separate power domain but in iMX7D Colibri, it’s seemly not support.

Do you have anyway or example to put Linux (run on A7) into suspend mode while RTOS (run on M4) still working?

Thanks so much!

If you put Linux in a suspend mode as described here pretty much any M4 application will continue to run.