Setting the GPIO2 bank as gpio

I am having trouble changing the SODIMM 111 (gpio2_0) to behave as a GPIO when programming the M4 core. The LED A is on SODIMM 178 (gpio1_15) and works fine.

    //...
    /* Setting up 178 */
    RDC_SetPdapAccess(RDC, BOARD_GPIO_LED_A_RDC_PDAP, 3 << (BOARD_DOMAIN_ID * 2), false, false);
    CCM_ControlGate(CCM, ccmCcgrGateGpio1, ccmClockNeededRunWait);
    configure_gpio_pin(BOARD_GPIO_LED_A_CONFIG);
    GPIO_Init(BOARD_GPIO_LED_A_CONFIG->base, &LED_A);
    GPIO_SetPinIntMode(BOARD_GPIO_LED_A_CONFIG->base, BOARD_GPIO_LED_A_CONFIG->pin, false);**
    /* Setting up 111*/
    /* RDC */
    RDC_SetPdapAccess(RDC, rdcPdapGpio2, 3 << (BOARD_DOMAIN_ID * 2), false, false);
    /* Enable clock used by GPIO ENCODER */
    CCM_ControlGate(CCM, ccmCcgrGateGpio1, ccmClockNeededRunWait);
    /* IOMUX */
    configure_gpio_pin(BOARD_GPIO_DATA00_CONFIG);
    /* Output with no Interruption */
    GPIO_Init(BOARD_GPIO_DATA00_CONFIG->base, &AD0);
    GPIO_SetPinIntMode(BOARD_GPIO_DATA00_CONFIG->base, BOARD_GPIO_DATA00_CONFIG->pin, false);
    //...
    
    /* on main loop*/
    GPIO_WritePinOutput(BOARD_GPIO_LED_A_CONFIG->base, BOARD_GPIO_LED_A_CONFIG->pin, true);
    GPIO_WritePinOutput(BOARD_GPIO_DATA00_CONFIG->base, BOARD_GPIO_DATA00_CONFIG->pin, true);
    GPIO_WritePinOutput(BOARD_GPIO_LED_A_CONFIG->base, BOARD_GPIO_LED_A_CONFIG->pin, false);
    GPIO_WritePinOutput(BOARD_GPIO_DATA00_CONFIG->base, BOARD_GPIO_DATA00_CONFIG->pin, false);

SODIMM 178 oscilates as expected, but I cannot read anything on SODIMM 111. Is there anything missing regarding the RDC or the CCM?

The SODIMM 178 also works fine as a gpio when using the Linux file system.

The M4 is being booted through the U-Boot, so it is also not an issue with the device tree or conflicting peripherals.

Greetings @Ilan_Figueiredo!

Which version of U-Boot you’ve got running there?

It could be that SODIMM 111 is taken over by U-Boot somehow, so I’d recommend you to check the U-Boot sources, look for the pin assignments for these two pins and try to replicate the configuration of the pin that works.

The U-Boot version is the 3.0b4. Where can I check if it is taking over the pins?

The pins work on M4 if configured as EIM. If the pins are being used by the U-Boot, shouldn’t their output also stay still when configuring them as ALT4?

@Ilan_Figueiredo,

You mean SODIMM 111 works as EIM (ALT4) on the M4 but not as GPIO (ALT5)?

It seems so. Using the same ports as ALT4 we can use the same pins as EIM (tho with some issues):
alt text

To use it as GPIO I set the SODIMM 111

IOMUXC_SW_MUX_CTL_PAD_EPDC_DATA00 to 4

and disable the interruption mode with

GPIO_SetPinIntMode(BOARD_GPIO_DATA00_CONFIG->base, BOARD_GPIO_DATA00_CONFIG->pin, false);

Then I loop a

        GPIO_WritePinOutput(BOARD_GPIO_LED_A_CONFIG->base, BOARD_GPIO_LED_A_CONFIG->pin, true);
        GPIO_WritePinOutput(BOARD_GPIO_DATA00_CONFIG->base, BOARD_GPIO_DATA00_CONFIG->pin, true);
        GPIO_WritePinOutput(BOARD_GPIO_LED_A_CONFIG->base, BOARD_GPIO_LED_A_CONFIG->pin, false);
        GPIO_WritePinOutput(BOARD_GPIO_DATA00_CONFIG->base, BOARD_GPIO_DATA00_CONFIG->pin, false);

To read it on an oscilloscope.

The difference between the pins is that one is at GPIO1_15, therefore IOMUXed to ALT0 and the other at GPIO2_0, therefore IOMUXed to ALT4.

Besides setting the RDC to both gpio banks:

    /* For SODIMM 178 */
    RDC_SetPdapAccess(RDC, rdcPdapGpio1, 3 << (BOARD_DOMAIN_ID * 2), false, false);
    /* For SODIMM 111 */
    RDC_SetPdapAccess(RDC, rdcPdapGpio2, 3 << (BOARD_DOMAIN_ID * 2), false, false);

One more strange piece of information: The pins work as GPIO as long as I use them as input. I also inserted a delay in the loop to evaluate if it was not a frequency issue, but it is not.

Could another module on the iMX7 be driving the pin to ground?

We got to the conclusion that changing the IOMUXC_SW_PAD_CTL_PAD_EPDC_DATA00 from default would cause the pin to stop working. Same apply to the rest of GPIO bank 2.

Perfect that you solved the issue. Thanks for the Feedback.

Best regards,
Jaski